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http://hdl.handle.net/123456789/2047
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DC Field | Value | Language |
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dc.contributor.author | Abhishikta | - |
dc.date.accessioned | 2022-12-23T18:29:36Z | - |
dc.date.available | 2022-12-23T18:29:36Z | - |
dc.date.issued | 2022-04 | - |
dc.identifier.uri | http://hdl.handle.net/123456789/2047 | - |
dc.description.abstract | When measuring weak signals, lock-in amplifiers (LIAs) are often employed to enhance noise-to-signal ratios. Constructing and testing an appropriately constructed LIA provides a wonderful chance for us to gain knowledge about the theory, construction, and applica- tions of LIA. We can get an understanding of time-dependent behaviour and a variety of components, ranging from resistors (R) and capacitors (C) to packed microchips such as de- modulators and phase shifters. We present the design and performance characteristics of a two-channel (Vx, Vy) balanced modulator/demodulator based LIA (AD630). The LIA has resistor-capacitor (RC) high-pass and low-pass filters, as well as different op-amp circuits and a phase shifter. VI | en_US |
dc.language.iso | en_US | en_US |
dc.publisher | IISER Mohali | en_US |
dc.subject | chip based | en_US |
dc.subject | amplifier | en_US |
dc.subject | ow frequency measurements | en_US |
dc.title | Design of a chip based lock-in amplifier for low frequency measurements | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | MS-17 |
Files in This Item:
File | Description | Size | Format | |
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It is under embargo period.pdf | 139.68 kB | Adobe PDF | View/Open |
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